1. Field of the Invention
The present invention relates to a method for inhibiting growth of intermetallic compounds. Particularly, a method for inhibiting growth of intermetallic compounds formed by reacting a thin solder layer with a layer of metal pad is shown. Furthermore, the present invention relates to a structure of flip-chip bonding.
2. Description of Related Art
The development tendency in semiconductor and package technology is to increase the density of components on a chip, and the interconnections get smaller and smaller. At present, the size (diameter) of a solder bump in flip-chip bonding processes is about 100 μm. Referring to FIG. 1, FIG. 2A, and FIG. 2B, a prior solder bump in flip-chip is shown. A method of preparing the prior solder bump comprises: depositing a layer of Cu pad (12) with the thickness of 5 μm onto a silicon (Si) substrate (11); depositing a layer of Ni pad (13) with the thickness of 3 μm onto the layer of Cu pad (12); and depositing a solder (14) with the thickness of 70-100 μm onto the layer of Ni pad (13), so that a semiconductor chip element (1) comprising microbumps is formed. Furthermore, the semiconductor chip element (1) is performed via a flip chip process, namely the semiconductor chip element (1) is interconnected with the element (2), which is the silicon substrate (21) having the layer of Cu pad (22) and the layer of Ni pad (23). In the small bumps, such as the microbumps in 3D IC (referring to FIG. 2B), the total bump height of the microbump is about 20 μm, wherein the thickness of the solder is up to 10 μm, and the layer of Cu pad or the layer of Ni pad on the upper and under side (under-bump-metallization, UBM) is about 8 μm respectively. Due to the bonding process, at least 3 times reflowing processes, or using for a while, the solder bumps will eventually totally transform to bumps having intermetallic compounds, such as Cu—Sn, Ni—Sn or Cu—Ni—Sn. It has been discovered that the said intermetallic compounds are fragile so as to seriously affect the mechanical properties of the solder bumps. For example, when the element is used in portable products, the bumps may break if the products fall or are hit. In recent years, in order to improve the problem noted above, a Ni layer is deposited on the microbumps as a diffusion barrier layer. However, the cost of this method is high, and a negative effect on the mechanical properties of the bumps is realized due to the high stress of Ni.
A tin solder is commonly used as a solder in package technology. An eutectic SnPb solder was bonded with Cu or Ni in a melted state (about 220° C.) in early package industries. However, the eutectic SnPb solder will react with Cu to form intermetallic compounds, such as Cu3—Sn and/or Cu6—Sn5. Since material having lead is harmful to the environment and environmental protection responsibility is becoming important, this kind of material of eutectic SnPb is forbidden to use as a solder in a flip chip bump, and lead free solder is used instead.
Currently, lead free solder, such as tin-silver or tin-silver-copper, etc, with a melting point about 50° C. higher than the prior eutectic SnPb solder, is commonly used. Subsequently, lead free solder should be performed in a bonding process at 250-260° C. However, most of the lead free solders react with Cu and Ni relatively fast and form a thick intermetallic compound (e.g. Cu—Sn compound). The mechanical properties of the solder bumps are good and can absorb stress, but the formed Cu—Sn intermetallic compounds have unsatisfactory mechanical properties (e.g. fragility). Therefore, when an entire structure having a thick Cu—Sn intermetallic compound undergoes stress, a brittle fracture within the Cu—Sn intermetallic compound is easy to occur, and will cause the entire structure to break.
Cu reacts with Sn rapidly, the reaction and subsequent growth even happens at room temperature. The growth of the intermetallic compounds (e.g. Cu6Sn5) can not be inhibited or controlled in the prior art. Generally, in the solder bump with a big size (e.g. the solder bump in flip chip), the intermetallic compound formed on the solder bump will not seriously affect the mechanical properties. Conversely, in a solder bump with a very small size (e.g. microbumps in 3D IC process), where the volume of the solder on the microbump is only one hundredth of the volume of the solder bump in typical flip chip processes, due to the bonding process, at least 10 times reflowing processes, or using for a while, the microbumps will quickly transform to bumps having Cu—Sn intermetallic compounds, which are fragile and will seriously affect the mechanical properties of the microbumps.
At present, a method for resolving the problem is that a Ni layer is deposited on the microbumps as a diffusion barrier layer. However, the cost of this method is high, and the negative effect on the mechanical properties of the bumps is realized due to the high stress of Ni.
In other prior art, Cu and Ni are deposited by the method of co-sputtering. However, the cost of the method is high, and a higher thickness film can not be formed by using the method. In addition, the speed of the reaction of lead free solder with Cu and Ni is much faster than the speed of the reaction of solder having lead with Cu and Ni, so that lead free solder can not be used in the method.
U.S. Pat. No. 6,716,738 B2 (Date of patent: Apr. 6, 2004) discloses “Method of fabrication multilayered UBM for flip chip interconnections by electroplating.” The patent relates to a method of electroplating a Cu—Ni alloy layer by adjusting current density. The Cu—Ni alloy layer is used for controlling the stress and the components of the metal layers, wherein Ni layer is used as a reaction barrier layer to inhibit the growth of compounds formed by the reaction of the solder with Cu and Ni. However, the process of electroplating the Cu layer and the Ni layer at the same time is complicated, and the components and the stress of the metal layers are hard to control. The yielding rate and stabilities of the metal layers is bad. Moreover, Cu also reacts with the solder.
U.S. Pat. No. 6,602,777 (Date of patent: Aug. 5, 2003) discloses “Method for controlling the formation of intermetallic compound in solder joints.” The patent relates to the intermetallic compound (e.g. (Cu1-xNix)6Sn5 or (Ni1-yCuy)3Sn4) formed by the reaction between a solder and a Ni layer being controlled by adjusting the concentration of Cu in the solder. However, the growth of the intermetallic compounds formed by the solder and Cu can not be controlled by this method.
Taiwan Patent No. 1338344 (Date of patent: Mar. 1, 2011) discloses “Semiconductor chip with solder bump suppressing growth of inter-metallic compound and method of fabricating the same.” The patent relates to how materials of the penetration layer penetrate into the solder bump to change the solder bump into a multi-component solder bump, so that the growth of the intermetallic compound is suppressed. However, the suppression of the Cu—Sn intermetallic compound is limited.
The public reference (“Retarding growth of Ni3P crystalline layer in Ni(P) substrate by reacting with Cu-bearing Sn(Cu) solders”, S. J. Wang, C. Y. Liu, Scripta Materialia 49 (2003) 813-818) relates to the reaction of the solder and Ni controlled by adjusting the concentration of Cu in the SN—Cu solder, so that the Ni3P formation is inhibited. However, the growth of the Cu—Sn or Ni—Sn compounds is not inhibited.
In order to improve upon the problems and disadvantages as stated above, the present invention provides a method for controlling the growth of the thickness of the intermetallic compound formed between the solder and Cu, namely the intermetallic compound (e.g. Sn—Cu compound) formed by the rapid reaction of the solder and Cu prior to a bonding process, and inhibiting the growth of the thickness of intermetallic compounds after the bonding process.